DAC 2012, San Francisco, USA – June 3 - 7, 2012 – Booth 2827. EnSilica, a leading independent provider of IC design services and system solutions, has announced that Posedge has standardized on its eSi-3250 32-bit processor core for the processing engine architecture for its range of wired/wireless networking IP solutions. The decision to standardize on the eSi-3250 has enabled Posedge to develop a single, flexible hardware architecture for multiple products that are also future-proofed for different protocols. Posedge chose the eSi-3250 over alternative solutions due to its scalability, programmability, low power consumption and competitive licensing model.
“Standardizing on the eSi-3250 will help ensure that our wired/wireless networking IP solutions are always commercially competitive both from a technical and cost perspective,” said Chakra Parvathaneni, Vice-President of Marketing for Posedge. “Of the three processors we evaluated, only the eSi-3250 exhibited the combination of functionality and flexible licensing that we needed to take our ambitious product development plans forward. EnSilica even created a special version of the eSi-3250, with the option to switch the caching capability on and off, giving us extra flexibility.”
Posedge uses the eSi-3250 processor core, which delivers a Dhrystone MIPS performance of up to 1.41 DMIPS per MHz, in both single and challenging, mixed-mode multicore configurations to provide scalable performance and address different markets including those for Wired Packet Processors, Wireless Packet Processors, Security Protocol Processors and Wireless LAN MAC Controllers.
Posedge’s latest solution to use the eSi-3250 is an innovative 12-core Wireless Packet Processor for application-aware WLAN access points and LTE basestations that not only delivers a 10x performance improvement over existing solutions but also provides application level value added features. The eSi-3250 has also been successfully deployed in a 7-core Residential and SMB Gateway solution, dual core WLAN upper and lower MAC controller processor, PON Gateway and TCP Offload Engine.
The eSi-3250’s configurability enables Posedge to optimize the processor for different target applications including, for example, an ultra-low gate count version with just 16 registers used in its multi-core wired/wireless packet processors, through to a full-featured 32 register version with single cycle multiplier for its dual core WLAN solution. The eSi-3250 also includes configuration options to accelerate various bit field operations, such as fast insertion and extraction, which are useful when processing network protocol headers.
“Posedge’s decision to standardize on the eSi-RISC family for its wired and wireless networking solutions proves that it performs better than alternative embedded processor cores even for the most demanding multicore and high performance networking applications,” said Ian Lankshear, Managing Director of EnSilica.
Both EnSilica and Posedge are exhibiting at DAC 2012 in San Francisco (Moscone Center, 3-7 June 2012). EnSilica can be visited on Booth 2827 for discussions on its comprehensive IC design services and complete portfolio of embedded IP, including a highly configurable 16/32 bit embedded processor called eSi-RISC, the eSi-Comms range of communications IP and eSi-Crypto encryption IP. Posedge (Booth 2802) will be demonstrating its use of the eSi-3250 in its 7-core Residential and SMB Gateway solution.
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About EnSilica’s eSi-RISC processors
EnSilica’s eSi-RISC family provides a range of high quality, highly configurable embedded processors that are easy to integrate. The processor subsystem is delivered fully targeted to customers’ ASIC technology, thereby reducing the integration effort. eSi-RISC processors provide the flexibility to define a range of hardware functions to optimize the silicon area. On–chip memory requirements are reduced through inter-mixed 16-bit and 32-bit instructions, resulting in good code density without compromising performance. It is the only processor scalable from 16-bits to 32-bits, starting from as low as 8.5k gates. eSi-RISC utilizes the industry standard GNU optimizing C/C++ compiler and Eclipse IDE for rapid software development, and supports efficient debugging on the target through a JTAG interface and hardware breakpoints. The development suite is common to both 16-bit and 32-bit processors, protecting users’ software investment.
EnSilica is an established company with many years experience providing high quality IC design services to customers undertaking FPGA and ASIC designs. EnSilica has an impressive record of success working across many market segments with particular expertise in multimedia and communications applications. Customers range from start-ups to blue-chip companies. EnSilica can provide the full range of IC design services, from System Level Design, RTL coding and Verification through to either a FPGA device or the physical design for ASIC designs. EnSilica also offers a portfolio of IP, including a highly configurable 16/32 bit embedded processor called eSi-RISC, the eSi-Comms range of communications IP and eSi-Crypto encryption IP. For further information about EnSilica, visit http://www.ensilica.com
Posedge Inc. is a world leader in intellectual property (IP) and services used in communications, networking, memory and I/O semiconductor design. Posedge’s comprehensive and integrated IP solutions – Wireless LAN 802.11a/b/g/n/ac, Wired/Wireless Packet Processors, Multi-Gigabit Routing, 10G MACsec engine, TCP Offload Engine, IPSEC Protocol Processor, Multi-gigabit Layer2+ Switch, SD/SDIO, Flash and bus protocols, enable semiconductor companies to rapidly and cost-effectively develop and differentiate their designs. These technology-leading solutions help give Posedge customers a competitive edge in bringing the best products to market quickly while reducing cost and risk. Posedge is headquartered in Sunnyvale, California. For more information, visit http://www.posedge.com