We are pleased to invite you to our complimentary Power Integrity Measurements Seminar Series. The seminar will take place in three locations across the United Kingdom, Finland and Sweden.

Agenda:

09:00 - 09:30 Registration and coffee

09:30 - 11:30 Seminar

11:30 - 13:00 Lunch

Tuesday 26th January 2016, Winnersh, United Kingdom  - Register here

Tuesday 2nd February 2016 Kista, Sweden -  Register here

Thursday 4th February 2016 Espoo, Finland -  Register here

Some key issues seen today:

• Increased functionality in the products you design, higher component density and frequency of operation drives the need for lower supply voltages.
• As modern systems of all kinds, not just battery-powered devices and integrated circuits, strive to become more ‘green’ and energy efficient, lower power consumption and efficient power management is key.
• Power rail tolerances are much tighter (from +/- 5% down to +/- 1%).
• Ripple, noise and transients riding on these lower DC supplies can adversely affect clocks and digital data. It is now important to capture transients that may affect high speed data and clocks.
• For engineers and technicians designing, validating and debugging these products there is a need to measure small AC signals, 10-15mV, riding on top of the DC supplies B93.
• Electrical validation at extended temperatures is a big bonus.

The seminar will cover the following:

• Tools and techniques for making power integrity measurements such as ripple, noise, spikes, compression, static/dynamic load response and supply induced signal noise and signal jitter. Included is a discussion of the effects of oscilloscope noise, probe noise, probe design considerations and attenuation ratio, offset range, input range, connection technique and measuring supply/signal crosstalk.
• How to debug and test PDN’s (power distribution networks) with more precision, accuracy and confidence and more easily isolate root cause of PDN noise.
• How to make high sensitivity current measurements, view and analyse small-current signals, calculate the total power consumed by battery devices in various operational states.

Who should attend:

Analogue and Digital Hardware Design and Validation Engineers, Signal Integrity Engineers, Quality Engineers, Engineering and Project Managers and Dedicated Power Engineers.

The potential benefits:

Improvements in power supply delivery can have the largest impact on reducing jitter and noise. These improvements are relatively easy to achieve, if you understand the root cause:

• The NEW Power Rail Probes have been designed by Keysight in response to this and are low noise, large offset range oscilloscope probes designed specifically for these new challenges.
• They enable users to measure small signals riding on top of DC supplies. This, combined with the new 10 bit, 40Gs/s ADC scope architecture provides a high resolution, low noise, low jitter unique solution.