ASIC Digital Design Engineer (Contract)

Summary

We are looking for an experienced contract ASIC design engineer to join the SCSC digital design group. As a digital design engineer you will be part of the team that develops Wi-Fi and Bluetooth communications technology for mobile devices.

We are looking for an experienced contract ASIC design engineer to join the SCSC digital design group. As a digital design engineer you will be part of the team that develops Wi-Fi and Bluetooth communications technology for mobile devices. Please note this role is inside IR35.   We are interested in people with experience of the design of complex embedded systems in a chip development environment. In addition to expert knowledge in designing and verifying area and power efficient RTL (Verilog), ideally you would also have experience in setting and meeting timing constraints, analysing and debugging gate level simulations and in high level modelling. As many of the modules operate on Wi-Fi and Bluetooth sampled data, some knowledge of digital signal processing would be an advantage.   An understanding of porting large ASIC designs to FPGAs is also desirable.

Key Responsibilities

  • Responsible for the implementation or modification modules from specifications.
  • Documentation of the designs for review
  • Module and system testing of the integrated modules with bespoke and existing test benches
  • Run trial synthesis and analyse results
  • Modify design as needed to meet timing and area constraints

Required Skills Knowledge and Expertise

  • Expert in digital design and verification using Verilog or SystemVerilog.
  • Competent in using ASIC design tools for simulation, synthesis and verification.
  • Proven ability to communicate technical subjects effectively.
  • Degree or equivalent qualification in Computer Science, Electrical Engineering, Mathematics or related fields

Desired Skills Knowledge and Expertise

  • Experience with advanced verification using SystemVerilog.
  • Understanding with ASIC design methodologies.
  • Knowledgeable in ARM CPU, bus and debug architecture
  • Experience with embedded C coding and debug tools
  • Understanding of digital signal processing concepts and techniques.
  • Porting of ASIC blocks to FPGAs

Office address

St Johns House
Cowley Road
CB4 0DS

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