Hands-on Training: AI in Design Verification
Hands-on Training: AI in Design Verification
🎟️ Cambridge Wireless members can get 20% discount by using the code: Cw20%Dc
Step into the future of verification with this AI in Design Verification Hands-on Training — a highly interactive, full-day experience where engineers build, test, and experiment with AI-driven DV workflows in real time.
Rather than sitting through passive lectures, participants will actively apply Generative AI, Machine Learning, and Reinforcement Learning techniques to solve practical, real-world verification challenges. Guided by expert mentors, this training is designed to help you move from theory to practical implementation in a single day.
💡 Key Themes Covered:
• AI Foundations: GenAI, ML, RL, and Genetic Algorithms (GA).
• AI in RTL: Auto-coding, linting, and PPA optimisation.
• AI in Verification: Spec-to-UVM generation, AI-driven testbench architecture, and ML for log analysis & coverage prediction.
• Tools & Integration: Open-source vs enterprise AI stacks, and integration with Synopsys VCS & Cadence Xcelium.
• Future of DV: Preparing for autonomous verification workflows.
👥 Who Should Join:
• Design Verification engineers (SystemVerilog / UVM)
• RTL and SoC engineers exploring AI-driven workflows.
• Technical leads evaluating AI adoption in DV.
• Engineers looking to boost productivity and reduce manual effort.
💰 Pricing:
• Standard Ticket: $60 (Be sure to apply code Cw20%Dc at checkout for an extra 20% off!)
Format: Hybrid (In-person at Austin, TX or Live Online)
Duration: Full-Day Training (12:00 PM - 7:00 PM CDT)
To secure your spot, please register on our ticket page: